drm/msm/dsi: fix check-before-set in the 7nm dsi_pll code
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 24 Feb 2021 22:47:51 +0000 (01:47 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 30 Mar 2021 12:32:01 +0000 (14:32 +0200)
commit7637048707e53c78810d9529bda92cbc820dc488
treeed1828fd6dedc7a414dbc3e080cfd89d3f28f00a
parent126aa8f234246654e121f37b49b4a5d249e2a86a
drm/msm/dsi: fix check-before-set in the 7nm dsi_pll code

[ Upstream commit 3b24cdfc721a5f1098da22f9f68ff5f4a5efccc9 ]

Fix setting min/max DSI PLL rate for the V4.1 7nm DSI PLL (used on
sm8250). Current code checks for pll->type before it is set (as it is
set in the msm_dsi_pll_init() after calling device-specific functions.

Cc: Jonathan Marek <jonathan@marek.ca>
Fixes: 1ef7c99d145c ("drm/msm/dsi: add support for 7nm DSI PHY/PLL")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/msm/dsi/pll/dsi_pll.c
drivers/gpu/drm/msm/dsi/pll/dsi_pll.h
drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c