sh_eth: fix TRSCER mask for R7S72100
authorSergey Shtylyov <s.shtylyov@omprussia.ru>
Sun, 28 Feb 2021 20:26:34 +0000 (23:26 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 17 Mar 2021 16:06:33 +0000 (17:06 +0100)
commit75d9be57cf2e1693c528638b47e16285b7562787
treed1d1356439bb9321fb39c55e53fda8626ace5dc1
parenta854bd0514650c7b20a3d4adca951a0a9fef0c0b
sh_eth: fix TRSCER mask for R7S72100

[ Upstream commit 75be7fb7f978202c4c3a1a713af4485afb2ff5f6 ]

According  to  the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware,
Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use
the driver's default TRSCER mask.  Add the explicit initializer for
sh_eth_cpu_data::trscer_err_mask for R7S72100.

Fixes: db893473d313 ("sh_eth: Add support for r7s72100")
Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/renesas/sh_eth.c