SSI-87: imx8: Configure SNVS
authorFranck LENORMAND <franck.lenormand@nxp.com>
Wed, 9 Oct 2019 08:27:43 +0000 (10:27 +0200)
committerYe Li <ye.li@nxp.com>
Thu, 29 Apr 2021 07:56:38 +0000 (00:56 -0700)
commit74c0afb1f9e822f10b138c978be87757dfa19317
treec6f17ee2d3e77f4ab3705ac8e75e0cb4078a57f5
parent99b17b7fbd443dfbd616319988dcd90ec617ba45
SSI-87: imx8: Configure SNVS

Add a module to configure the tamper and secure violation of
the SNVS using the SCU API.

The module also adds some commands:
 - snvs_cfg: Configure the SNVS HP and LP registers
 - snvs_dgo_cfg: Configure the SNVS DGO bloc if present (8QXP)
 - tamper_pin_cfg: Change the configuration of the tamper pins
 - snvs_clear_status: Allow to write to LPSR and LPTDSR to clear status bits

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Reviewed-by: Silvano Di Ninno <silvano.dininno@nxp.com>
(cherry picked from commit b84be4fa1454ee0cd718be329d630b55aff34273)
(cherry picked from commit 24b0be839ea2166ee80194b93d8efcca70b81539)
arch/arm/mach-imx/imx8/snvs_security_sc.c
board/freescale/imx8qm_mek/imx8qm_mek.c
configs/imx8qm_mek_defconfig
configs/imx8qm_mek_fspi_defconfig
configs/imx8qxp_mek_defconfig
configs/imx8qxp_mek_fspi_defconfig