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(parent: 2d430fd) | patch
MLK-12203-1 ARM: imx: adjust i.MX7D DDR retention mode for LPSR
authorAnson Huang <Anson.Huang@nxp.com>
Sat, 9 Jan 2016 16:02:00 +0000 (00:02 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 19:49:45 +0000 (14:49 -0500)
commit6cacdcbfcdd00b76837fe0ebe5fae9359b16915e
tree02ab072a7c34bf0365e5d43862e7590b6eee4989tree | snapshot
parent2d430fd2c1d9453b53157abf395a6d7bdeea53decommit | diff
MLK-12203-1 ARM: imx: adjust i.MX7D DDR retention mode for LPSR

Per design team's recommendation, for i.MX7D TO1.1
LPSR mode, as IOMUXC will lost power, so it needs to
use TO1.0's flow to avoid CKE toggle during retention,
but it has a limitation of POR reset fail during LPSR.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
arch/arm/mach-imx/suspend-imx7.S diff | blob | history