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(parent: 70fd49e) | patch
MLK-17188-1 clk: imx: imx8qxp: add uSDHC clock MUX
authorAnson Huang <Anson.Huang@nxp.com>
Tue, 12 Dec 2017 12:47:05 +0000 (20:47 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Tue, 20 Mar 2018 19:51:24 +0000 (14:51 -0500)
commit559d2992c27fde371f3529e4df33442934ab0ab8
tree6c711fedcd183eeb5d923f6e68f25852f9ba0eb6tree | snapshot
parent70fd49ea59a695de736c0379b2f2bb775f43cf7acommit | diff
MLK-17188-1 clk: imx: imx8qxp: add uSDHC clock MUX

Add uSDHC clock MUX to allow uSDHC driver to select
parent, currently only support PLL0 and PLL1 as
uSDHC clock's parent.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
Tested-by: Haibo Chen <haibo.chen@nxp.com>
drivers/clk/imx/clk-imx8qxp.c diff | blob | history
include/dt-bindings/clock/imx8qxp-clock.h diff | blob | history