MLK-14599-1 soc:imx8:Update SCFW API
authorRanjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Fri, 31 Mar 2017 15:29:19 +0000 (10:29 -0500)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:21:48 +0000 (15:21 -0500)
commit54df3c5348811f9e5d8a181f14dc3915ab8e615a
treedafcdfdb46380dcea2cb151bec4856f325c673e7
parent7f522bbe5df52489eb140a24e75d4880733112e1
MLK-14599-1 soc:imx8:Update SCFW API

Update SCFW API to the following commit in SCFW git:
"
'commit: ("a620caf7444c45715b68b5cf128219005598365f")'
Author: Mike <michael.kjar@nxp.com>
Date:   Thu Mar 30 18:35:27 2017 -0500

Added a DDR Stress Test to the test folder

- New DDR test is like the stress test where we increment/sweep the DDR freq
- More tests may be added as development continues
- Modified mx8qm/soc.h to boot the A72 to DDR when building with option qmddr
"

Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
19 files changed:
drivers/pinctrl/freescale/pinctrl-imx8qxp.c
drivers/soc/imx/sc/svc/irq/rpc.h
drivers/soc/imx/sc/svc/misc/rpc.h
drivers/soc/imx/sc/svc/misc/rpc_clnt.c
drivers/soc/imx/sc/svc/pad/rpc.h
drivers/soc/imx/sc/svc/pad/rpc_clnt.c
drivers/soc/imx/sc/svc/pm/rpc.h
drivers/soc/imx/sc/svc/pm/rpc_clnt.c
drivers/soc/imx/sc/svc/rm/rpc.h
drivers/soc/imx/sc/svc/timer/rpc.h
drivers/soc/imx/sc/svc/timer/rpc_clnt.c
include/dt-bindings/pinctrl/pins-imx8qxp.h
include/dt-bindings/soc/imx_rsrc.h
include/soc/imx8/sc/svc/irq/api.h
include/soc/imx8/sc/svc/misc/api.h
include/soc/imx8/sc/svc/pad/api.h
include/soc/imx8/sc/svc/pm/api.h
include/soc/imx8/sc/svc/timer/api.h
include/soc/imx8/sc/types.h