MLK-19252-5 drm/bridge: sec-dsim: improve PLL PMS configs

MLK-19252-5 drm/bridge: sec-dsim: improve PLL PMS configs

Generally, different modes request different frequency bit clock,
so create a table to contain the PLL PMS config for each display
mode. This commit first contains several PLL PMS config entry for
several most popular CEA standard display modes.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 016ebc631e592e16848cd6426dd5b262a401746f)
(cherry picked from commit 5cddc84ba36c8107ec24f44a59351886181acdf1)
(cherry picked from commit c423258e23b9c6e7c3d777a856b370fc0715baff)