MLK-14279 arm: imx: remove PTC1 control on i.MX7ULP during VLLS
authorAnson Huang <Anson.Huang@nxp.com>
Mon, 27 Feb 2017 17:50:20 +0000 (01:50 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:21:57 +0000 (15:21 -0500)
commit5315db4dc4f6dcedf421624f76f34fc7f2242bff
tree4940dedf2cf23b1a6546fe50828014ba4e911538
parent0623094f3e46d2bf15ebd19bc0e71ae2491a9dd1
MLK-14279 arm: imx: remove PTC1 control on i.MX7ULP during VLLS

On A2 board, NVCC_DRAM_SW power control is changed from PTC1
to PTB6, and PTB6 will be controlled by M4, so A7 does NOT
need to control this pin during VLLS, M4 will do it.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
arch/arm/mach-imx/suspend-imx7ulp.S