MLK-17293-5 clk: imx7ulp: adjust clk tree for B0 chip

MLK-17293-5 clk: imx7ulp: adjust clk tree for B0 chip

On i.MX7ULP B0 chip, snvs is located in M4 domain, remove
snvs clock from linux clock tree;

Use SMC PMCTRL RUNM field for ARM clock mux instead
of reserved register in SCG, as when CPU frequency changes,
RUNM field will switch between RUN and HSRUN, ARM clock
source will be changed accordingly, so RUNM can be used as
a clock mux.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>