clk: renesas: r8a77995: Correct RCLK handling
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 11 Jul 2018 12:12:19 +0000 (14:12 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 27 Aug 2018 15:00:18 +0000 (17:00 +0200)
commit4f57998d647772280a6442bbc746249e5bfee572
tree1d52dc87c271a4f4193c80c4ca970e03b7329d18
parentdc643a843b5d510c04b2e222a1a4bd735d387f50
clk: renesas: r8a77995: Correct RCLK handling

According to R-Car Gen3 Hardware Manual Rev.1.00, R-Car D3 has the
RCLK Frequency Control Register (RCKCR), which determines the OSC and
RINT predivider values, and selection of the RCLK clock source between
RINT and the On-Chip Oscillator.

Hence change the OSC and RINT clock definitions to use the RCKCR
divider, and add the missing On-Chip Oscillator and RCLK clock source
switching logic.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
drivers/clk/renesas/r8a77995-cpg-mssr.c