MLK-21150-3 drm/bridge: sec-dsim: add a new property 'pref-rate'
authorFancy Fang <chen.fang@nxp.com>
Fri, 15 Mar 2019 04:09:58 +0000 (12:09 +0800)
committerLeonard Crestez <leonard.crestez@nxp.com>
Wed, 17 Apr 2019 23:51:34 +0000 (02:51 +0300)
commit4f0a55d59e56f07f90aede3f852ddd9d91ec6502
tree75bd8d461c1358b9d8725301104fe5016af49499
parente7e0cb666336ef552a070c0bde0c8a24e90c6e42
MLK-21150-3 drm/bridge: sec-dsim: add a new property 'pref-rate'

Add a new property 'pref-rate' support which can be used to
assign a different clock frequency for the DPHY PLL reference
clock in the dtb file. And if this property does not exist,
the default clock frequency for the reference clock will be
used. And according to the spec, the DPHY PLL reference clk
frequency should be in [6MHz, 300MHz] range.

Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit a9fafe8108505f8a1580af898ff5fa9c26d03680)
Documentation/devicetree/bindings/display/bridge/sec_dsim.txt
drivers/gpu/drm/bridge/sec-dsim.c