MLK-14653 cpufreq: imx6q: reparent pll1_sys to pll1_bypass before changing it's rate

MLK-14653 cpufreq: imx6q: reparent pll1_sys to pll1_bypass before changing it's rate

Make sure we reparent pll1_sys to pll1_bypass before changing it's
rate. Otherwise, it may happen that pll1_sys is "parented" to
pll1_bypass_src like this:

  osc
    pll1                  0            0   996000000          0 0
    pll1_bypass_src       0            0    24000000          0 0
       pll1_bypass        0            0    24000000          0 0
          pll1_sys        0            0    24000000          0 0

in which case changing the rate of pll1_sys won't propagate up to pll1
and we will end up with a different pll1_sys rate than requested.

This fixes an issue where cpufreq can't properly switch to 792Mhz:

  $ cpufreq-set -f 996000
  $ cpufreq-set -f 396000
  $ cpufreq-set -f 792000
  $ cat /sys/kernel/debug/clk/clk_summary
  pll1              1            1   996000000          0 0
    pll1_bypass     1            1   996000000          0 0
       pll1_sys     1            1   996000000          0 0
         pll1_sw    1            1   996000000          0 0
           arm      2            2   498000000          0 0

Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>