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(parent: c332481) | patch
clk: imx: imx8mn: mark sys_pll1/2 as fixed clock
authorPeng Fan <peng.fan@nxp.com>
Thu, 24 Oct 2019 01:58:42 +0000 (01:58 +0000)
committerShawn Guo <shawnguo@kernel.org>
Fri, 25 Oct 2019 09:07:05 +0000 (17:07 +0800)
commit3f44344868cfcd76b2ca0fe334a76a17a120cdd9
tree7b05c5f0feaf458d0599e60a660f0e66cc9d4f04tree | snapshot
parentc332481f62fa2f29af234bf85846268a5a0b173ecommit | diff
clk: imx: imx8mn: mark sys_pll1/2 as fixed clock

According Architecture definition guide, SYS_PLL1 is fixed at
800MHz, SYS_PLL2 is fixed at 1000MHz, so let's use imx_clk_fixed
to register the clocks and drop code that could change the rate.

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/clk/imx/clk-imx8mn.c diff | blob | history