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(parent: 3cd1ab1) | patch
MLK-17634-18: drm: imx: dcss: optimize context loading and DDR bus load
authorLaurentiu Palcu <laurentiu.palcu@nxp.com>
Mon, 26 Feb 2018 14:16:19 +0000 (16:16 +0200)
committerLeonard Crestez <leonard.crestez@nxp.com>
Wed, 17 Apr 2019 23:51:34 +0000 (02:51 +0300)
commit3db247ec457b996d0e509e60c5c5a5af7988a74f
treed3f2bfc4d49e47681f7c402549c034c8eaa32c44tree | snapshot
parent3cd1ab17a0ceab229d26d5c12758005b9ac61a3ecommit | diff
MLK-17634-18: drm: imx: dcss: optimize context loading and DDR bus load

This will lower the amount of ctxld entries sent, if configuration has
not changed much. Also, disable channel 0 if alpha is 0 and global alpha
is used. This will lower the DDR load, depending on graphics channel
resolution.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
drivers/gpu/drm/imx/dcss/dcss-plane.c diff | blob | history
drivers/gpu/imx/dcss/dcss-ctxld.c diff | blob | history
drivers/gpu/imx/dcss/dcss-dpr.c diff | blob | history
drivers/gpu/imx/dcss/dcss-dtg.c diff | blob | history
drivers/gpu/imx/dcss/dcss-dtrc.c diff | blob | history
drivers/gpu/imx/dcss/dcss-scaler.c diff | blob | history