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MLK-12415: ARM: imx: imx6q: ddr3 adjust read/write latency from DCD
authorAdrian Alonso <adrian.alonso@nxp.com>
Thu, 18 Feb 2016 19:36:36 +0000 (13:36 -0600)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 19:51:43 +0000 (14:51 -0500)
commit3b987b8df348a5ef7dd0e5808302a299377eb9b1
tree7101de91916f8c0489afa1f7588d3a911f403941tree | snapshot
parent2a542969d2a7407e5e5f4bba91d506d2e47e8595commit | diff
MLK-12415: ARM: imx: imx6q: ddr3 adjust read/write latency from DCD

Adjust high frequence (528M) read/write additional latency settings
from target board initial configuration; Save/restore MMDC_MDMISC
from DCD settings.

Remove hardcodded value to issue a ZQ calibration command.

Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
(Cherry picked from commit 1036293d72173ef9051ec23babfd4d7f13db4f58)
arch/arm/mach-imx/busfreq_ddr3.c diff | blob | history
arch/arm/mach-imx/ddr3_freq_imx6.S diff | blob | history
arch/arm/mach-imx/ddr3_freq_imx6sx.S diff | blob | history