mmc: sdhci-of-at91: rework clocks management to support SAM9x60 device
authorLudovic Desroches <ludovic.desroches@microchip.com>
Thu, 28 Nov 2019 07:45:21 +0000 (08:45 +0100)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 16 Dec 2019 11:28:09 +0000 (12:28 +0100)
commit3976656d67c1e47a5deb25f2c2fdc188dd97dbd7
tree312c0ff4eb189214535854b2c5ef606da4e0ca39
parentd684be14457fb69a5fd6af32ca2e232cb43c5efc
mmc: sdhci-of-at91: rework clocks management to support SAM9x60 device

In the SAM9x60 SoC, there are only two clocks instead of three for the
SDHCI device. The base clk is no longer provided, it is generated
internally from the mult clk.

The values of the base clk and mul in the capabilities registers may not
reflect the reality as the mult clk is a programmable clock which can take
several rates. As we can't trust those values, take them from the clock
tree and update the capabilities according to.

As we can have the same pitfall, in some cases, with the SAMA5D2 Soc,
stop relying on capabilities too.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20191128074522.69706-2-ludovic.desroches@microchip.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-of-at91.c