PCI: cadence: Retrain Link to work around Gen2 training defect
authorNadeem Athani <nadeem@cadence.com>
Tue, 9 Feb 2021 14:46:21 +0000 (15:46 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 11 Mar 2021 13:17:29 +0000 (14:17 +0100)
commit1d3efd15e8a43ce2ea91c040f77ef67a0b2b3bc5
tree5377a21c2f0ea7370e43817911c10a9a9b8b5f41
parent015d38539db9121147682380111f7a460eb46df4
PCI: cadence: Retrain Link to work around Gen2 training defect

[ Upstream commit 4740b969aaf58adeca6829947a3ad8da423976cf ]

Cadence controller will not initiate autonomous speed change if strapped
as Gen2. The Retrain Link bit is set as quirk to enable this speed change.

Link: https://lore.kernel.org/r/20210209144622.26683-3-nadeem@cadence.com
Signed-off-by: Nadeem Athani <nadeem@cadence.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/pci/controller/cadence/pci-j721e.c
drivers/pci/controller/cadence/pcie-cadence-host.c
drivers/pci/controller/cadence/pcie-cadence.h