MLK-16471-01 clk: imx8qm/imx8qxp: fix ptp clock parent

MLK-16471-01 clk: imx8qm/imx8qxp: fix ptp clock parent

Connectivity sbsystem ADD documention Figure 7-2 clock connection
of ENET-AVB has wrong clock connection for ipg_clk_time:
ENETn_CLK_ROOT -> LPCG -> CLKDIV -> ipg_clk_time

Confirm with IC and integration owner, in fact the timer clock path is:
ENETn_CLK_ROOT -> LPCG -> ipg_clk_time

(BuildInfo: SCFW 3e70523d, IMX-MKIMAGE 0, ATF 0)

Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>