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(parent: a51d9f8) | patch
drm/amd/display: have two different sr and pstate latency tables for renoir
authorJoseph Gravenor <joseph.gravenor@amd.com>
Fri, 8 Nov 2019 19:30:34 +0000 (14:30 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 5 Dec 2019 23:17:02 +0000 (18:17 -0500)
commit10bce710fa6feb13ec270d5420aad3b81f6bf7ea
tree76c2a133b24f501ba3e7f536914f9f3d7f473ffdtree | snapshot
parenta51d9f8fe756beac51ce26ef54195da00a260d13commit | diff
drm/amd/display: have two different sr and pstate latency tables for renoir

[Why]
new sr and pstate latencies are optimized for the case when we are not
using lpddr4 memory

[How]
have two different wm tables, one for the lpddr case and one for
non lpddr case

Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c diff | blob | history