mmc: renesas_sdhi: keep SCC clock active when tuning
authorWolfram Sang <wsa+renesas@sang-engineering.com>
Tue, 1 Sep 2020 15:02:49 +0000 (17:02 +0200)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 7 Sep 2020 07:16:32 +0000 (09:16 +0200)
commit0f93db6542fa94262b611ff942b9b3ad7ecbea10
treebefae0c92cf4fda160c0f960fb646d5a7632fb4c
parent97a7d87e96b02fc5b3944d7735e0f6b8446d07da
mmc: renesas_sdhi: keep SCC clock active when tuning

Tuning procedure switches to lower frequencies but that will turn the
SCC off and accessing its register then will hang. So, check when we are
tuning and keep the current setup of the external clock if we are doing
so. Note that we still switch to the lower frequency because of the
internal divider. We just make sure to not modify the external clock.
This patch depends on a MMC core patch calling the downgrade function
earlier.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20200901150250.26236-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/renesas_sdhi_core.c