powerpc/perf: Fix to update radix_scope_qual in power10
authorAthira Rajeev <atrajeev@linux.vnet.ibm.com>
Thu, 26 Nov 2020 16:54:38 +0000 (11:54 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 30 Dec 2020 10:53:32 +0000 (11:53 +0100)
commit0760233fd45070542fbc4f1b1156296fcde096bb
tree1bc5afc58d52e2d7cacaf64d8114098d74e331ed
parent36daf5b174a1fa7475b8e0edfc6547880d677fe9
powerpc/perf: Fix to update radix_scope_qual in power10

[ Upstream commit d3afd28cd2f35b2a1046b76e0cf010b684da2e84 ]

power10 uses bit 9 of the raw event code as RADIX_SCOPE_QUAL.
This bit is used for enabling the radix process events.
Patch fixes the PMU counter support functions to program bit
18 of MMCR1 ( Monitor Mode Control Register1 ) with the
RADIX_SCOPE_QUAL bit value. Since this field is not per-pmc,
add this to PMU group constraints to make sure events in a
group will have same bit value for this field. Use bit 21 as
constraint bit field for radix_scope_qual. Patch also updates
the power10 raw event encoding layout information, format field
and constraints bit layout to include the radix_scope_qual bit.

Fixes: a64e697cef23 ("powerpc/perf: power10 Performance Monitoring support")
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1606409684-1589-2-git-send-email-atrajeev@linux.vnet.ibm.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/powerpc/perf/isa207-common.c
arch/powerpc/perf/isa207-common.h
arch/powerpc/perf/power10-pmu.c